commit 48be30434513d1376878489644041c880b56e8c1 Author: Danny Rawlins <contact@romster.me> Date: Mon Aug 30 01:02:15 2021 +1000 [notify] llvm: AVX Incorrect code created, regression from 11.0 diff --git a/llvm/.footprint b/llvm/.footprint index 30ee21365..c8165c48b 100644 --- a/llvm/.footprint +++ b/llvm/.footprint @@ -1785,6 +1785,10 @@ drwxr-xr-x root/root usr/include/llvm/XRay/ -rw-r--r-- root/root usr/include/llvm/XRay/XRayRecord.h -rw-r--r-- root/root usr/include/llvm/XRay/YAMLXRayRecord.h drwxr-xr-x root/root usr/lib/ +-rwxr-xr-x root/root usr/lib/LLVMgold.so +drwxr-xr-x root/root usr/lib/bfd-plugins/ +lrwxrwxrwx root/root usr/lib/bfd-plugins/LLVMgold.so -> ../LLVMgold.so +lrwxrwxrwx root/root usr/lib/bfd-plugins/libLTO.so -> ../libLTO.so drwxr-xr-x root/root usr/lib/cmake/ drwxr-xr-x root/root usr/lib/cmake/llvm/ -rw-r--r-- root/root usr/lib/cmake/llvm/AddLLVM.cmake diff --git a/llvm/.signature b/llvm/.signature index 4b1472e55..a426134c6 100644 --- a/llvm/.signature +++ b/llvm/.signature @@ -1,6 +1,7 @@ untrusted comment: verify with /etc/ports/opt.pub -RWSE3ohX2g5d/b8fnC7+uNHjU1yDzP/CIRZLz+sG61eQ8zTdOTyABXYePuft4IV0vQE3eACQ8ZS+8wU9tFGmzzVLCqsQ7JSaCgU= -SHA256 (Pkgfile) = 3d766fd1342ee2d65a6fe50e1c74406b2362f8b97575fa44412954179ce72a5b -SHA256 (.footprint) = 567f94d08ad018de2dbafdaa6ac34f4999d94a2cf375545d1be04df1145ac2e9 +RWSE3ohX2g5d/RvBcyu+jCK65JXJDZ6er+abNe55RrStJabtoYld2V4iDq+k+P6S0cNDiKcjuRugGvXT2bFZmID+mQHyFSvnmws= +SHA256 (Pkgfile) = 2b6af98c5f86a0eb035e7de004cc7c9f8efa0fa5c7fd4408206ebdc396082453 +SHA256 (.footprint) = 39108efa76f0fb409c02917e07c43dc31cbd1e4363f260c4a96bc6cce67da0a2 SHA256 (llvm-12.0.1.src.tar.xz) = 7d9a8405f557cefc5a21bf5672af73903b64749d9bc3a50322239f56f34ffddf SHA256 (llvm-config.h) = 2227b83b904348e5530f3475c978e11cb0f05a85024781dcb49ac86b65582707 +SHA256 (x86-twist-shuffle-mask.patch) = c51b8754f76eb3774f46d530409f6d89f5bb47d90f0d718dbfa861f716b29693 diff --git a/llvm/Pkgfile b/llvm/Pkgfile index d4bc7c892..3207dc8a3 100644 --- a/llvm/Pkgfile +++ b/llvm/Pkgfile @@ -5,11 +5,16 @@ name=llvm version=12.0.1 -release=1 +release=2 source=(https://github.com/llvm/llvm-project/releases/download/llvmorg-$version/llvm... - llvm-config.h) + llvm-config.h + x86-twist-shuffle-mask.patch) build() { + # https://reviews.llvm.org/D104903 + # https://bugs.llvm.org/show_bug.cgi?id=50823 + patch -d $name-$version.src -p2 -i $SRC/x86-twist-shuffle-mask.patch + export CC=gcc export CXX=g++ @@ -19,6 +24,7 @@ build() { -D CMAKE_C_FLAGS_RELEASE="$CFLAGS" \ -D CMAKE_CXX_FLAGS_RELEASE="$CXXFLAGS" \ -D LLVM_TARGETS_TO_BUILD='X86;AMDGPU;BPF;NVPTX' \ + -D LLVM_BINUTILS_INCDIR=/usr/include \ -D LLVM_BUILD_LLVM_DYLIB=1 \ -D LLVM_LINK_LLVM_DYLIB=1 \ -D LLVM_PARALLEL_COMPILE_JOBS="${JOBS:-1}" \ @@ -36,4 +42,8 @@ build() { # multilib stub mv $PKG/usr/include/llvm/Config/llvm-config{,-64}.h install -m 0644 $SRC/llvm-config.h $PKG/usr/include/llvm/Config/ + + install -d $PKG/usr/lib/bfd-plugins + ln -s ../LLVMgold.so $PKG/usr/lib/bfd-plugins/ + ln -s ../libLTO.so $PKG/usr/lib/bfd-plugins/ } diff --git a/llvm/x86-twist-shuffle-mask.patch b/llvm/x86-twist-shuffle-mask.patch new file mode 100644 index 000000000..a868237b0 --- /dev/null +++ b/llvm/x86-twist-shuffle-mask.patch @@ -0,0 +1,117 @@ +From 2c3bca2c3f13a0a9ef71d549a90fba23e6997d44 Mon Sep 17 00:00:00 2001 +From: "Wang, Pengfei" <pengfei.wang@intel.com> +Date: Mon, 5 Jul 2021 21:08:49 +0800 +Subject: [PATCH] Twist shuffle mask when fold HOP(SHUFFLE(X,Y),SHUFFLE(X,Y)) + -> SHUFFLE(HOP(X,Y)) + +This patch fixes PR50823. + +The shuffle mask should be twisted twice before gotten the correct one due to the difference between inner HOP and outer. + +Reviewed By: RKSimon + +Differential Revision: https://reviews.llvm.org/D104903 + +(cherry picked from commit 9ab99f773fec7da4183495a3fdc655a797d3bea2) +--- + llvm/lib/Target/X86/X86ISelLowering.cpp | 7 ++--- + llvm/test/CodeGen/X86/haddsub-undef.ll | 4 +-- + llvm/test/CodeGen/X86/packss.ll | 2 +- + llvm/test/CodeGen/X86/pr50823.ll | 35 +++++++++++++++++++++++++ + 4 files changed, 42 insertions(+), 6 deletions(-) + create mode 100644 llvm/test/CodeGen/X86/pr50823.ll + +diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp +index 1e2407c7e7f6..d8b2f765e953 100644 +--- a/llvm/lib/Target/X86/X86ISelLowering.cpp ++++ b/llvm/lib/Target/X86/X86ISelLowering.cpp +@@ -43194,9 +43194,10 @@ static SDValue combineHorizOpWithShuffle(SDNode *N, SelectionDAG &DAG, + ShuffleVectorSDNode::commuteMask(ShuffleMask1); + } + if ((Op00 == Op10) && (Op01 == Op11)) { +- SmallVector<int, 4> ShuffleMask; +- ShuffleMask.append(ShuffleMask0.begin(), ShuffleMask0.end()); +- ShuffleMask.append(ShuffleMask1.begin(), ShuffleMask1.end()); ++ const int Map[4] = {0, 2, 1, 3}; ++ SmallVector<int, 4> ShuffleMask( ++ {Map[ShuffleMask0[0]], Map[ShuffleMask1[0]], Map[ShuffleMask0[1]], ++ Map[ShuffleMask1[1]]}); + SDLoc DL(N); + MVT ShufVT = VT.isFloatingPoint() ? MVT::v4f64 : MVT::v4i64; + SDValue Res = DAG.getNode(Opcode, DL, VT, Op00, Op01); +diff --git a/llvm/test/CodeGen/X86/haddsub-undef.ll b/llvm/test/CodeGen/X86/haddsub-undef.ll +index 68d058433179..e7c8b84d3bc7 100644 +--- a/llvm/test/CodeGen/X86/haddsub-undef.ll ++++ b/llvm/test/CodeGen/X86/haddsub-undef.ll +@@ -1166,7 +1166,7 @@ define <4 x double> @PR34724_add_v4f64_u123(<4 x double> %0, <4 x double> %1) { + ; AVX512-FAST: # %bb.0: + ; AVX512-FAST-NEXT: vextractf128 $1, %ymm0, %xmm0 + ; AVX512-FAST-NEXT: vhaddpd %ymm1, %ymm0, %ymm0 +-; AVX512-FAST-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,2,0,3] ++; AVX512-FAST-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,0,1,3] + ; AVX512-FAST-NEXT: retq + %3 = shufflevector <4 x double> %0, <4 x double> %1, <2 x i32> <i32 2, i32 4> + %4 = shufflevector <4 x double> %0, <4 x double> %1, <2 x i32> <i32 3, i32 5> +@@ -1267,7 +1267,7 @@ define <4 x double> @PR34724_add_v4f64_01u3(<4 x double> %0, <4 x double> %1) { + ; AVX512-FAST-LABEL: PR34724_add_v4f64_01u3: + ; AVX512-FAST: # %bb.0: + ; AVX512-FAST-NEXT: vhaddpd %ymm1, %ymm0, %ymm0 +-; AVX512-FAST-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,3,1,3] ++; AVX512-FAST-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,2,3,3] + ; AVX512-FAST-NEXT: retq + %3 = shufflevector <4 x double> %0, <4 x double> undef, <2 x i32> <i32 0, i32 2> + %4 = shufflevector <4 x double> %0, <4 x double> undef, <2 x i32> <i32 1, i32 3> +diff --git a/llvm/test/CodeGen/X86/packss.ll b/llvm/test/CodeGen/X86/packss.ll +index 16349ae2c7f9..ac431b7556ea 100644 +--- a/llvm/test/CodeGen/X86/packss.ll ++++ b/llvm/test/CodeGen/X86/packss.ll +@@ -370,7 +370,7 @@ define <32 x i8> @packsswb_icmp_zero_trunc_256(<16 x i16> %a0) { + ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1 + ; AVX2-NEXT: vpcmpeqw %ymm1, %ymm0, %ymm0 + ; AVX2-NEXT: vpacksswb %ymm0, %ymm1, %ymm0 +-; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,0,2,3] ++; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,1,0,3] + ; AVX2-NEXT: ret{{[l|q]}} + %1 = icmp eq <16 x i16> %a0, zeroinitializer + %2 = sext <16 x i1> %1 to <16 x i16> +diff --git a/llvm/test/CodeGen/X86/pr50823.ll b/llvm/test/CodeGen/X86/pr50823.ll +new file mode 100644 +index 000000000000..c5d5296e5c66 +--- /dev/null ++++ b/llvm/test/CodeGen/X86/pr50823.ll +@@ -0,0 +1,35 @@ ++; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ++; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=core-avx2 | FileCheck %s ++ ++%v8_uniform_FVector3 = type { float, float, float } ++ ++declare <8 x float> @llvm.x86.avx.hadd.ps.256(<8 x float>, <8 x float>) ++ ++define void @foo(%v8_uniform_FVector3* %Out, float* %In, <8 x i32> %__mask) { ++; CHECK-LABEL: foo: ++; CHECK: # %bb.0: # %allocas ++; CHECK-NEXT: vmovups (%rsi), %xmm0 ++; CHECK-NEXT: vhaddps 32(%rsi), %xmm0, %xmm0 ++; CHECK-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,0,1,1] ++; CHECK-NEXT: vhaddps %ymm0, %ymm0, %ymm0 ++; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm1 ++; CHECK-NEXT: vaddss %xmm1, %xmm0, %xmm0 ++; CHECK-NEXT: vmovss %xmm0, (%rdi) ++; CHECK-NEXT: vzeroupper ++; CHECK-NEXT: retq ++allocas: ++ %ptr_cast_for_load = bitcast float* %In to <8 x float>* ++ %ptr_masked_load74 = load <8 x float>, <8 x float>* %ptr_cast_for_load, align 4 ++ %ptr8096 = getelementptr float, float* %In, i64 8 ++ %ptr_cast_for_load81 = bitcast float* %ptr8096 to <8 x float>* ++ %ptr80_masked_load82 = load <8 x float>, <8 x float>* %ptr_cast_for_load81, align 4 ++ %ret_7.i.i = shufflevector <8 x float> %ptr_masked_load74, <8 x float> %ptr80_masked_load82, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11> ++ %Out_load19 = getelementptr %v8_uniform_FVector3, %v8_uniform_FVector3* %Out, i64 0, i32 0 ++ %v1.i.i100 = tail call <8 x float> @llvm.x86.avx.hadd.ps.256(<8 x float> %ret_7.i.i, <8 x float> %ret_7.i.i) ++ %v2.i.i101 = tail call <8 x float> @llvm.x86.avx.hadd.ps.256(<8 x float> %v1.i.i100, <8 x float> %v1.i.i100) ++ %scalar1.i.i102 = extractelement <8 x float> %v2.i.i101, i32 0 ++ %scalar2.i.i103 = extractelement <8 x float> %v2.i.i101, i32 4 ++ %sum.i.i104 = fadd float %scalar1.i.i102, %scalar2.i.i103 ++ store float %sum.i.i104, float* %Out_load19, align 4 ++ ret void ++}